Numerical validation in current hardware architectures

This book constitutes the thoroughly refereed post-proceedings of the Dagstuhl Seminar 08021 on Numerical Validation in Current Hardware Architectures held at Dagstuhl Castle, Germany, in January 2008. The 16 revised full papers presented were selected during two rounds of reviewing and improvements. The papers are organized in topical sections on languages, software systems and tools, new verification techniques based on interval arithmetic, applications in science and engineering, and novel approaches to verification.